Hello Friends,
I have a mysterious behavior in my KL04 chip. My aim is to simple start running the LPTMR as a free running timer. At an event occurence I see the LPTMR0_CNR and calculate ,based on my clk to the LPTMR, the duration. Now, as I am using it as a free running timer, I presume, it does not need LPTMR0_CMR as I am not comparing with anything. Also, I am not using any interrupts, so I kept the LPTMR0_CMR = 0;
The code is below -
#include "derivative.h" /* include peripheral declarations */
int main(void)
{
int count;
uint16_t countTemp = 0;
// asm(" CPSIE i");
MCG_C1 |= 0x02;
MCG_C2 |= 0x01;
SIM_SOPT1 = 0;
SIM_SCGC5 |= (SIM_SCGC5_LPTMR_MASK | SIM_SCGC5_PORTB_MASK);//PORTC_PCR1 |= PORT_PCR_MUX(1);//select RTC_CLKIN function
PORTB_PCR3 |= 0x00000100; // alternative pin mux selection //
GPIOB_PDDR |= 0x00000008; // pin direction //
PORTB_PCR4 |= 0x00000100; // alternative pin mux selection //
GPIOB_PDDR |= 0x00000010; // pin direction //
MCG_SC = 0x40;
SIM_SCGC5|=SIM_SCGC5_LPTMR_MASK;
/* Reset LPTMR settings */
SIM_SOPT1 = 0;
SIM_SCGC5 |= (SIM_SCGC5_LPTMR_MASK | SIM_SCGC5_PORTB_MASK);//PORTC_PCR1 |= PORT_PCR_MUX(1);//select RTC_CLKIN function
LPTMR0_CSR=0;
//LPTMR0_CSR |= 0x00000040;
LPTMR0_CMR = 0;
GPIOB_PTOR |= (1 << 3);
GPIOB_PTOR |= (1 << 4);
LPTMR0_PSR |= 0x04;
GPIOB_PTOR |= (1 << 3);
GPIOB_PTOR |= (1 << 4);
/* Start the timer */
LPTMR0_CSR |= LPTMR_CSR_TEN_MASK;
/* Wait for counter to reach compare value */
asm("nop");
while(1){
asm("nop");
asm("nop");
asm("nop");
asm("nop");
LPTMR0_CNR = 45;
count = LPTMR0_CNR;
if(count >7000){
LPTMR0_CSR &= ~LPTMR_CSR_TEN_MASK;
LPTMR0_CSR |= 0x00000040;
LPTMR0_CNR = 45;
count = LPTMR0_CNR;
LPTMR0_CSR |= LPTMR_CSR_TEN_MASK;
}
}
}
I am first writing a junk value (in this case 45) to LPTMR0_CNR and then reading it. Always the value in LPTMR0_CNR is '0'.
But, then I made LPTMR0_CMR = 8000;
Then did the same code. This time around, the value of LPTMR_CNR went upto 8000 or so and then a roll over. So, despite all this there is
a comparison and a rollover causes a reset of LPTMR0_CNR. Y So !!!!!!!
Vinod
解決済! 解決策の投稿を見る。
Hi Vinod,
I was able to get the attached code to run using CW10.6.+ PE. The main.c #define can be changed to run baremetal code or PE code.
Regards,
David
Hello vinod,
after all. your purpose is to use LPTMR as 16 bit free run counter ?
As David says, the problem was you had forgotten to set TFC bit of TMPR0_CSR?
Please let us know your purpose.
Best regards,
Yasuhiko Koumoto.
Hello Sir,
Yes I found that out and is now working. Thank you Mr Koumoto and Mr Seymour for all the help.
VInod
Hello vinod,
thank you for your correct answer at another my post.
You are right. First, I could not understand your comment.
Do you claim for not keeping LPTMR0_CMR 0?
However, LPTMR0_CMR=0 indicates the LPTMR0_CNR is always reset.
Anyway, what inconveniences do you have if LPTMR0_CMR is set 0xffff (i.e. the maximum value)?
Please tell me the purpose of your post.
Best regards.
Yasuhiko Koumoto.
Hello vinod,
I tried the same scenario and found a strange behavior.
That is, LPTMR0_CNR is always showing 0.
However, the compare interrupt caused as normally.
What happened?
I am afraid there are some setting to show LPTMR0_CNR value.
Best regards,
Yasuhiko Koumoto.