KV58, SPI, PCS0

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a8Chcx
Contributor V

Hi,

I am using KDS2.8.0 sample project "dspi_polling_b2b_transfer_master" to communicate with "IS25LP032D" flash memory.

Here are configuration for SPI0:

PORT_SetPinMux(PORTC, 4, kPORT_MuxAlt2); 
PORT_SetPinMux(PORTC, 5, kPORT_MuxAlt2); 
PORT_SetPinMux(PORTC, 6, kPORT_MuxAlt2); 
PORT_SetPinMux(PORTC, 7, kPORT_MuxAlt2); 

I can't read the mode register from flash memory.

But, If I configure PCS0 as GPIO, and set it to LOW before transmit and set to HIGH after receiving, it works fine.

1) Could you tell when it is wrong when I am using PCS0?

2) Can I adjust some parameters to make it work with PCS0?

Thanks,

Christie

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nxf56274
NXP Employee
NXP Employee

Hi,

You would better configure PCS0 as GPIO. If you configure pin as PCS0, the pin is driven by the library.

The lib will configure the pin's level automatically. But it will cause some problems.  For example, some device needs get the address firstly and then get the data. During this time, the cs should be always low. But the spi lib will control the pin as high when the address is transferred. Finally, you can't control the device due to the wrong timing sequence. So Configuring the PCS as GPIO is more flexible. 

Have a great day,
TIC

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633件の閲覧回数
nxf56274
NXP Employee
NXP Employee

Hi,

You would better configure PCS0 as GPIO. If you configure pin as PCS0, the pin is driven by the library.

The lib will configure the pin's level automatically. But it will cause some problems.  For example, some device needs get the address firstly and then get the data. During this time, the cs should be always low. But the spi lib will control the pin as high when the address is transferred. Finally, you can't control the device due to the wrong timing sequence. So Configuring the PCS as GPIO is more flexible. 

Have a great day,
TIC

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- We are following threads for 7 days after the last post, later replies are ignored
Please open a new thread and refer to the closed one, if you have a related question at a later point in time.
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