KL1x RAM areas

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KL1x RAM areas

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joachimbeck
Contributor I

Hi,

I have a question regarding the two SRAM areas of the KL1x processors. One region starts at 0x20000000 the other is below this address. Is it allowed to combine these to RAM areas to one linker region? Or with other words, is it allowed that a variable crosses the boundary of the two regions?

Thanks and regards

Joachim

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BlackNight
NXP Employee
NXP Employee

Hi Joachim,

I would say that Keil MDK then has wrong linker files. Not wrong that it does not work, but not how it should be.

All Kinetis L to my knowledge does not have that memory segmentation, and the Freescale Kinetis Design Studio creates/uses linker files without that 0x2000'0000 boundary. I suggest that you change the linker file in Keil MDK?

Erich

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chris_brown
NXP Employee
NXP Employee

Hi Joachim,

I saw this post and just had to comment.  I can confirm that there is no memory segmentation like the K series, so it is alright to use the entire memory region for whatever purpose you want.  However, in the beginning of the L-series, we did still partition the memory because, in our sample code, the interrupt vectors were still copied from Flash to RAM (for better execution speeds).  So depending on what your code is doing, you may have to take this into consideration.  (Not sure what code base you started from).  Just wanted you to be aware.

Regards,

Chris

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BlackNight
NXP Employee
NXP Employee

Hi Joachim,

is this for a Kinetis L device? I ask because the L devices do not have such a memory segmentation. However, the K devices do have this, because they have two memory controllers, one for each memory segment. So technically the memory is divided at 0x2000'0000 on these devices.

In general you should not have variables crossing this boundary. It is an issue if the variable would be accessed with a misaligned access.

Have a look at this article and especially at the discussions/comments:

http://mcuoneclipse.com/2013/07/10/freertos-heap-with-segmented-kinetis-k-sram/

I hope this helps,

Erich

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joachimbeck
Contributor I

Hi Erich,

Thank you!

It is for Kinetis L device (KL05 and KL16).

I was not sure, if this segmentation exists also in these processors, because all examples in Keil MDK use the memory only starting with 0x2000'0000.

Thanks again,

Joachim

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BlackNight
NXP Employee
NXP Employee

Hi Joachim,

I would say that Keil MDK then has wrong linker files. Not wrong that it does not work, but not how it should be.

All Kinetis L to my knowledge does not have that memory segmentation, and the Freescale Kinetis Design Studio creates/uses linker files without that 0x2000'0000 boundary. I suggest that you change the linker file in Keil MDK?

Erich

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