Interfacing MK64FN1M0VLQ12 with MRAM MR2A16ACMA35

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Interfacing MK64FN1M0VLQ12 with MRAM MR2A16ACMA35

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fshah30
Contributor II

Hi,

I am interfacing my prototype design between MK64FN1M0VLQ12 and MR2A16ACMA35. Please confirm my connections let me know if I did wrong.

16bit non multiplexed mode:

Data Lines:

FB_AD[31:24] => DQL0 to DQU15.//Please confirm the orientation is correct?

DQL0 connects with DQU15

DQL1 connects with DQU14

DQL2 connects with DQU13

DQL3 connects with DQU12

DQL4 connects with DQU11

DQL5 connects with DQU10

DQL6 connects with DQU9

DQL7 connects with DQU8

Address Lines:

FB_AD[0:17] => A[0:17] //Please confirm the orientation is correct?

Control Signals:

FB_RW_b => ~W

FB_OE_b => ~G

FB_CS0_b => ~E

FB_BE7_0_BLS31_24 => ~LB //Please confirm the connection

FB_BE15_8_BLS23_16 => ~UB //Please confirm the connection

I hope got your reply ASAP. Thanks

 

 

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1,226 次查看
fshah30
Contributor II

Hi, Let me check with new board design how it goes. Thank you.

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EdwinHz
NXP TechSupport
NXP TechSupport

Hi @fshah30,

The address line orientation and control signals seem fine. I just find the connection of DQL[7:0] to DQU [8:15] confusing. What are you trying to achieve with these connections?

 

BR,

Edwin.

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1,242 次查看
fshah30
Contributor II

Hi Edwin,

 

Thanks for your reply.

 

I want to interface parallel MRAM with MK64FN1M0VLQ12. I got this interface schematic please confirm if I go with same connections. Please advise if I can use the attached MRAM interface @Page#4

Thank you,

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EdwinHz
NXP TechSupport
NXP TechSupport

Hi @fshah30.,

Alright, the connections for the MRAM seem good. You can use this as base for the connections with your MK64.

 

BR,

Edwin.

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