Hi, on K22 Flexbus I noticed that during write cycles WE signal is constantly held LOW and CE is being toggled by MCU. From what I googled and from datasheet of my SRAM IS66WV1M16EALL data is written to SRAM on rising edge of WE. If there is no rising edge of WE during write cycle on Flexbus will any data be wrriten to my SRAM? Will they be written on rising edge of CE? Finally, will it work with my SRAM?
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Hi,
Compare the Flexbus write timing with IS66WV1M16EALL write cycle timing, customer can us /FB_CSn (AA=1) rising edge to write data to SRAM.
Wish it helps.
Have a great day,
Mike
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Hi,
Compare the Flexbus write timing with IS66WV1M16EALL write cycle timing, customer can us /FB_CSn (AA=1) rising edge to write data to SRAM.
Wish it helps.
Have a great day,
Mike
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
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