Allowable Jitter for MK70FN1M0VMJ12 and Rise time for Reset signal

取消
显示结果 
显示  仅  | 搜索替代 
您的意思是: 

Allowable Jitter for MK70FN1M0VMJ12 and Rise time for Reset signal

792 次查看
puspamnayak
Contributor III


Hi,

I am using  MK70FN1M0VMJ12 in my project and using 32.768KHz Crystal, 12 MHz Crystal and 50 MHz Oscillator. So want to know if there is any limitation on Jitter or allowable jiiter for MK70FN1M0VMJ12

Secondaly want to what is the minimum/ maximum Rise time and fall time for RESET_b signals

Kindly reply soon

Thanks and Regards,

Puspam N

标记 (1)
0 项奖励
回复
2 回复数

706 次查看
Hui_Ma
NXP TechSupport
NXP TechSupport

Hi,

There without any jitter limitation for MK70FN1M0VMJ12 system oscillator or RTC oscillator module.

The external input clock with below requirement:

OSCILATOR.jpg

If you consider to use RESET_b pin to reset the chip, there with the minimum pulse width that is guaranteed to be recognized as a pin interrupt request.

The Min. external reset pulse width is 100ns.

There with no rise time limitation for reset_b signal.


Wish it helps.
best regards
Ma Hui

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

0 项奖励
回复

706 次查看
puspamnayak
Contributor III

Hi,

Thanks for sharing the information.

Thanks and regards,

Puspam N

0 项奖励
回复