SPI1 on K82

取消
显示结果 
显示  仅  | 搜索替代 
您的意思是: 

SPI1 on K82

1,675 次查看
diken
Contributor I

Hey,

 

I am trying to configure SPI1 on the K82 FRDM board.

I am useing PCS1. On the scope I see a 12 Mhz SCK clocks when my configuration is for 500Khz.

Also I don't see anything on the PCS1 line even though I have it confgured on the pin-mux file.

 

When using CTAR0 I see an 8 bit clock pattern but data and clock are out of sync.

 

 

 

/**  *@brief Initializes the SPI peripheral  *@return none  */ void SPI_Initialize(void) {     uint32_t srcClock_Hz;     dspi_master_config_t masterConfig;      /* Master config */     masterConfig.whichCtar = kDSPI_Ctar1;     masterConfig.ctarConfig.baudRate = TRANSFER_BAUDRATE;     masterConfig.ctarConfig.bitsPerFrame = 8U;     masterConfig.ctarConfig.cpol = kDSPI_ClockPolarityActiveHigh;     masterConfig.ctarConfig.cpha = kDSPI_ClockPhaseFirstEdge;     masterConfig.ctarConfig.direction = kDSPI_MsbFirst;     masterConfig.ctarConfig.pcsToSckDelayInNanoSec = 1000000000/TRANSFER_BAUDRATE;     masterConfig.ctarConfig.lastSckToPcsDelayInNanoSec = 1000000000/TRANSFER_BAUDRATE;     masterConfig.ctarConfig.betweenTransferDelayInNanoSec = 1000000000/TRANSFER_BAUDRATE;      masterConfig.whichPcs = DSPI_MASTER_PCS_FOR_TRANSFER;     masterConfig.pcsActiveHighOrLow = kDSPI_PcsActiveLow;      masterConfig.enableContinuousSCK = false;     masterConfig.enableRxFifoOverWrite = false;     masterConfig.enableModifiedTimingFormat = false;     masterConfig.samplePoint = kDSPI_SckToSin0Clock;      srcClock_Hz = CLOCK_GetFreq(DSPI_MASTER_CLK_SRC);     DSPI_MasterInit(DSPI_MASTER_BASEADDR, &masterConfig, srcClock_Hz);  }  /**  *@brief Writes a byte of data to the SPI bus  *@param data Byte data to write on bus  *@return result Result of data written on SPI bus.  */ char SPI_Write(unsigned char data) {     //  //    unsigned char rdata = 0; // //    dspi_transfer_t      masterXfer; // //    /* Start master transfer */ //    masterXfer.txData = &data; //    masterXfer.rxData = &rdata; //    masterXfer.dataSize = 1; //    //masterXfer.configFlags = kDSPI_MasterCtar1 | DSPI_MASTER_PCS_FOR_TRANSFER | kDSPI_MasterPcsContinuous; // //    DSPI_MasterTransferBlocking(DSPI_MASTER_BASEADDR, &masterXfer);      DSPI_MasterWriteCommandDataBlocking(DSPI_MASTER_BASEADDR, data);      return data;  }

 

 

    CLOCK_EnableClock(kCLOCK_PortB);       CLOCK_EnableClock(kCLOCK_PortD);       /* SPI1 */     PORT_SetPinMux(PORTB, 23U, kPORT_MuxAsGpio);          //NRF_IRQ     PORT_SetPinMux(PORTB, 9U, kPORT_MuxAlt6);               //NRF_CSN      PORT_SetPinMux(PORTD, 5U, kPORT_MuxAlt7);          //NRF_SCK     PORT_SetPinMux(PORTD, 6U, kPORT_MuxAlt7);          //NRF_MOSI     PORT_SetPinMux(PORTD, 7U, kPORT_MuxAlt7);          //NRF_MISO

    CLOCK_EnableClock(kCLOCK_PortB);

 


    CLOCK_EnableClock(kCLOCK_PortD);

 


    /* SPI1 */
    PORT_SetPinMux(PORTB, 23U, kPORT_MuxAsGpio);        //NRF_IRQ
    PORT_SetPinMux(PORTB, 9U, kPORT_MuxAlt6);            //NRF_CSN

 

    PORT_SetPinMux(PORTD, 5U, kPORT_MuxAlt7);        //NRF_SCK
    PORT_SetPinMux(PORTD, 6U, kPORT_MuxAlt7);        //NRF_MOSI
    PORT_SetPinMux(PORTD, 7U, kPORT_MuxAlt7);        //NRF_MISO

标签 (1)
标记 (1)
0 项奖励
回复
5 回复数

1,241 次查看
diken
Contributor I

Hello,

The demos under dspi folder do not work for me.

I tried the bubble demo under the apps folder and that works.

I also checked with the scope on the PA14, 15, 16, 17 pins where SPI 0 master is allocated and I don't see any signal.

Also for the SPI polling demo nothing shows up under the terminal.

The boot loader for this board ( opensda )is really bad. I have to plug /unplug the board just so that it can load the new firmware.

I based the SPI demo below from the polling SPi example and I still see the issue between MOSI and SCK line. Also the CS line is not active. I have activated the pin under the board file.

http://s000.tinyupload.com/?file_id=45478221156128599200

From what I see this looks like an issue with the bootloader or the KSDK2 HAL.

Di

0 项奖励
回复

1,241 次查看
Alice_Yang
NXP TechSupport
NXP TechSupport

Hello Di,

Please be sure the correct line connection .

I test the demo of   SDK_2.0_FRDM-K82F\boards\frdmk82f\driver_examples\dspi\polling_transfer

it can work well :

pastedImage_0.png

from the slaveRxData[] , we can see the salve received the data master send :

pastedImage_1.png

we can refer to the "readme.txt"(boards\frdmk82f\driver_examples\dspi\polling_transfer\readme.txt) to connect :

pastedImage_3.png

pastedImage_2.jpg

BR

Alice

0 项奖励
回复

1,241 次查看
Alice_Yang
NXP TechSupport
NXP TechSupport

Hello Di,

Do you use the KSDK v2.0 , if yes, there is SPI demo under KSDK,

SDK_2.0_FRDM-K82F\boards\frdmk82f\driver_examples\dspi

You can first to test it on your board.

BR

Alice

0 项奖励
回复

1,241 次查看
diken
Contributor I

Hello Alice,

Yes, I am using KSDK 2. This code is based on the demo, but when using this configuration:

  1.     masterConfig.whichCtar = kDSPI_Ctar0; 

I see that the SCK clock and the data from the MISO pins are not synchronized.

Also do I have to control PCS1 manually or does the peripheral take care of that?

I don't see the PCS1 activating when data is coming out of the MISO line.

Di

0 项奖励
回复

1,241 次查看
Alice_Yang
NXP TechSupport
NXP TechSupport

Hello Di,

In the demo , the CTAR configuration is the same with you,

masterConfig.whichCtar = kDSPI_Ctar0;

so please first run the dome check whether it can work well as you want .

Aobut the PCS , it configured in these code :

pastedImage_0.png

when it active, it should be low .

BR

Alice

0 项奖励
回复