.lcf file
MEMORY { rom : org = 0x00000000 len = 0x80000 // mapping internal flash address ram : org = 0x003F9800 len = 0x6800 // internal RAM}/* We use FORCEACTIVE so that the linker will not deadstrip the exception table gExceptionTable. */FORCEACTIVE { gExceptionTable }SECTIONS { .reset : {} > rom .init : {} > rom GROUP : { .text (TEXT) : {} .rodata (CONST) : { *(.rdata) *(.rodata) } .ctors : {} .dtors : {} extab : {} extabindex : {} } > rom GROUP : { .data : {} .sdata : {} .sbss : {} .sdata2 :{} .sbss2 : {} .bss : {} .PPC.EMB.sdata0 : {} .PPC.EMB.sbss0 : {} } > ram}
.cfg file
;----------------------------------------------------------------------; Standard Initialization Code for AXIOM CME-555 Evaluation Board; version for DEBUG (execution in external );----------------------------------------------------------------------writereg MSR 0x00003002 ;RI=1, IP=0, ME=1, FP=1writereg SRR1 0x00003002writereg IMMR 0xFFF00000 ;FLEN=0 (internal Flash disabled)writereg BBCMCR 0x00000000 ;ETRE=0writereg ICTRL 0x00000007 ;normal not serialized modewritemem.l 0x2fc000 0x00000000 ;SIUMCRwritemem.l 0x2fc004 0xFFFFFF88 ;SYPCR (disable watchdog, bus monitor enable)writemem.l 0x2fc100 0x00000003 ;BR0 -at 0x00000000 - 0x0007FFFF), 512KByteswritemem.l 0x2fc104 0xFFF80022 ;OR0writemem.l 0x2fc108 0x00400003 ;BR1 -at 0x00400000 - 0x0047FFFF), 512KByteswritemem.l 0x2fc10c 0xFFF80022 ;OR1writemem.l 0x2fc110 0x00800003 ;BR2 -at 0x00800000 - 0x0087FFFF), 512KByteswritemem.l 0x2fc114 0xFFF80022 ;OR2writemem.l 0x2fc140 0x00000000 ;DMBRwritemem.l 0x2fc144 0x00000000 ;DMORwritemem.w 0x300000 0x0000 ;DPTMCRwritemem.w 0x300004 0xFFA0 ;RAMBARwritemem.w 0x305014 0x0000 ;PORTQSwritemem.w 0x305016 0x0000 ;PQSPAR/DDRQSwritemem.w 0x306100 0x0000 ;MPIOSMDRwritemem.w 0x306102 0x0000 ;MPIOSMDDRwritemem.w 0x306800 0x0000 ;MIOS1TPCRwritemem.l 0x380000 0x00000000 ;SRAMMCRwritemem.l 0x2fc024 0x00000000 ;SGPIODT1writemem.l 0x2fc028 0x00000000 ;SGPIODT2writemem.l 0x2fc02c 0x00000000 ;SGPIOCRwritemem.l 0x2fc030 0x00000000 ;EMCR;writemem.l 0x307f80 0x00000000 ;UMCRwritemem.l 0x2fc384 0x55ccaa33 ;PLPRCRK, open keywritemem.l 0x2fc284 0x00900000 ;PLPRCR, 40MHz;writemem.l 0x2fc380 0x55ccaa33 ;SCCRK, open key;writemem.l 0x2fc280 0x00010000 ;SCCR#-------------------------------------------------------------------# The debugger sets the DER register based on the EPPC Exceptions# preference panel after running this initialization file, this# this value will be overwritten. We only put it in here because# the flash programmer uses this file also.#--------------------------------------------------------------------writereg DER 0x73e67c0f ;DER