Help with programming - 68hc908gp32

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Help with programming - 68hc908gp32

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XC
Contributor I

Greetings people, I'm currently using PWM to control an output current feeding into a charging circuit
I have managed to get the PWM coding working with various duty cycle
My query is , how do i get the PWM signal to vary from let's say 80%->60%->40%->20%->etc with an interval between the duty cycle about 5 Minutes...Do i vary the duty cycle or the period???

By the way im utilizing the 68hc908gp32 processor...


Thank you...hoping to get an answer ASAP....


Once again TQ::smileysad:

 

Added p/n to subject.




Message Edited by NLFSJ on 2008-02-29 09:13 AM
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peg
Senior Contributor IV
Hi XC,

Firstly, to directly answer your specific question:


XC wrote:

Do i vary the duty cycle or the period???

By the way im utilizing the 68hc908gp32 processor...




You vary the duty cycle or pulse width. Varying the period is frequency modulation, not Pulse Width Modulation (PWM).
As you have specified the GP32 this only has one two channel timer.
If you use buffered PWM it is all used up, even unbuffered leaves you with a fast probably low count on the second channel. This means you will probably have to count the periods in order to generate the time periods to do the PW changes.
Perhaps you could do smaller steps to make the time periods between them shorter (count value smaller).

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bigmac
Specialist III
Hello,
 
Assuming my original interpretation of your problem is incorrect, and that described by allawtterb is the correct one -
 
Provided you don't need the second TIM channel for another purpose, the use of unbuffered PWM will probably be simpler than an alternative output compare process.  You do not say what PWM frequency you require, but for a battery charging application, I suspect it will not be critical, and need not be very high.  If this is so, you may not need to change the TMOD setting from its default value, so the spare channel would remain fully useable.
 
As Peg has said, the counting of TIM overflows would seem a reasonable method of timing the current profile over an extended period.  If you are programming in C, it is easy to use a 16-bit or 32-bit variable as the counter, so this should not give any practical restriction on the timing interval.
 
While unbuffered PWM does not need the use of interrupts for a steady duty cycle output, to change the duty cycle in a smooth, non-disruptive manner may require the use of the channel interrupt.  This is to avoid the possibility of a spurious pulse during the transition to the new duty cycle.  This may not be particularly critical for the battery charging application, if only a few duty cycle steps are necessary, but may become more important if many more smaller steps are used.
 
The following sequence of events might be used to change to a new duty cycle -
  1. During normal operation, the TIM overflow interrupt would be enabled, and the channel interrupt would be disabled.
  2. Within the overflow ISR, it would be decided when each duty cycle update is required.  The new value could be placed within a suitable global variable, and the TIM channel interrupt then enabled, before exiting the ISR.
  3. The next TIM interrupt event will be the channel interrupt, and this will occur after the channel output pin has returned to an inactive state.  The global variable value would be transferred to the channel register, and further channel interrupts then disabled, before exiting the ISR.
Since the PWM output is inactive when the channel register is updated, there can be no spurious pulse whether duty cycle is decreased or increased.  The next pulse will commence with the following overflow.
 
Regards,
Mac
 
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XC
Contributor I
Hi....
These are the codes that i have written..doesnt seem rite though..


 org   flash      ;start main code at the beginning of flash
                      


init

     mov #$01,config2    ;Osc disable on stop, SCI clock source internal
     mov #$31,config1    ;COP disabled, all other default
     
   
     ldhx #$0240          ;load HX with the end of memory location
     txs                     ;put the stack pointer at the end of memory
     

     clra                    ;clears A, X, and H regs
     clrx
     clrh


****************       memory definitions   *****************************

   jsr  duty_80



*Timer initialization subroutine for 80% duty cycle(20% of C)

duty_80:
      
      lda       t1sc
      lda       #$70
      sta       t1sc
      lda       t1sc0
      mov       #$1e,t1sc0
      ldhx      #$bfff
      sthx      t1modh
      mov       #$a0,t1ch0h
      mov       #$00,t1ch0l ; duty cycle
      bclr      5,t1sc
      clr       count
      jsr       ISR_routine
      rts


      
      

*Interrupt service routine for Various Duty Cycle with internal Timer

ISR_routine:

      cli
     
here:
      bra  here

     rts

*timer counter overflow


outov   inc     count
        ldhx    #!10000
        cphx    count
        beq     new_duty
      
        rti

new_duty mov    #$20,t1ch0h
         mov    #$00,t1ch0l ; duty cycle
         bset   6,t1sc0
         rti
      
Do i use Buffered or unbuffered PWM ???


this is my initial working pwm code....how do i vary the duty cycle with an interval of 5 Minutes..using this way?



*main

        org     $8000

init

      mov       #$31,config1
again:
        lda     #$80
        sta     duty
        nop
        jsr     pwmd4
        bra     again


*tim initialization

pwmd4:

      lda       t1sc
      lda       #$73
      sta       t1sc
      lda       t1sc0
      mov       #$5a,t1sc0
      ldhx      #$00ff
      sthx      t1modh
      mov       #$00,t1ch0h
      mov       #$d0,t1ch0l ; duty cycle
      bclr      5,t1sc
      cli
here:
     bra        here
     rts


* output compare

outcp   bclr    7,t1sc0
        rti

*timer counter overflow

outov   bclr    7,t1sc
        rti




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bigmac
Specialist III
Hello,
 
The code that you posted seemed to have structural errors, as well as a number of programming errors and omissions.  Rather than itemise each problem, which will possibly result in confusion, I have attached a sample absolute assembly program.  This handles unbuffered PWM along the lines that I previously described, and provides a timed decrement of PWM duty.  You might consider this as a basic framework for your project.
 
The code should assemble using CW, but is otherwise untested.  For timing purposes, a bus frequency of 4.0 MHz has been assumed.  If a different bus frequency is used, this will require adjusment of the timing constants.  I have omitted the code for initialisation of the CGM and associated PLL, and for GPIO initialisation, but this will need to be done.  You might consider using a 32.768 kHz crystal, which the 'GP32 is intended to accommodate.
 
Regards,
Mac
 
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XC
Contributor I
Thanks for the reply.....will look into the codes ASAP and understand it ...


Thank you once again....
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allawtterb
Contributor IV
I'm not sure that is clear exactly what you want.  It seems bigmac thinks you want a period of 5 minutes but I am not sure this is what you are wanting.  I thought you might want to decrease the duty cycle from 80% to 20% over a period of 5 minutes, is this the case? 
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JimDon
Senior Contributor III
- You need another timer to time the change between duty cycles.
- For example use the RTC interrupt with a count down.
- When the count reaches 0, you would write to the duty cycle register to change it.
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bigmac
Specialist III
Hello,
 
For such a long PWM period, you will not be able to directly generate a PWM output using a TIM channel.  A simple alternative might be to count each timer overflow, and use the count value as a basis for switching the required output pin.
 
The increment and testing of the counter value might be done within the TIM overflow ISR.  Assuming that the counter is a 16-bit value, the overflow period should be 5 milliseconds, or greater, to achieve 300 second PWM cycle period.
 
Let's assume an overflow period of 30 milliseconds.  The number of overflows for a full PWM cycle would be 10000.  When the counter reaches this value, it would be cleared, and the output set active.  When the counter reaches a value corresponding to the required duty (1000 for each 10 percent), the output would be set inactive.
 
Regards,
Mac
 


Message Edited by bigmac on 2008-03-04 04:38 AM
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