DZ60A CAN: Memory Map for Rx & Tx Buffers?

[belskyc]

Hello,

I'm beginning work with the new S08DZ60A and utilizing the CAN.  I have a previous application written for the older HC08AZ60A that I'd like to port over to the new DZ60A.  The data sheet for the AZ60A (data sheet rev 6) shows clearly on page 281 the memory map for the MSCAN08 showing the address locations for the Rx & Tx buffers (also highlights this memory map on page 36).  However, nowhere in the DZ60A data sheet (data sheet rev 4) can I find the memory map for the MSCAN Rx & Tx Buffers.  Does anyone know where I can find this information? 

Thanks much,

~belskyc

[belskyc · Accepted solution]

Well, looks like I'm replying to my own post.  For those of you (if any) who are interested in using the CAN on the S08DZ60A, there are some differences when compared to the older HC08AZ60A concerning memory mapping with the Rx and Tx buffers.  In the older AZ60A, there are three Tx buffers that are all in the foreground (addressable directly by the CPU - addresses 0x0550, 0x0560 and 0x0570); however, the DZ60A uses a paging system where there's only one Tx buffer in the foreground located at address 0x18B0 and the register CANTBSEL (address 0x188A) selects which Tx buffer (0-2) to move to the foreground at 0x18B0.  Thus, if you're porting code from the old AZ60A to the new DZ60A pay attention to this difference. 

There is some sample code using the CAN on the S08DZ60A located at:

http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=S08D&fpsp=1&tab=Design_Tools_Tab

Also, I discovered that use of assignment operators (such as |= or &=) on any of the CAN registers cause nondeterministic behavior.  I'm using CodeWarrior 6.1 and their standard C-compiler. 

~belskyc