We have an existing design running a single rank DDR3 SODIMM on a iMX6SoloX. We are respinning the board and wonder about supporting dual rank DIMMs since the customer wants more memory. The processor has only a single DDR3 clock output.
1. Is there a recommended solution for buffering this single clock output to drive multiple loads?
2. I am confused as to the number of ODT signals supported. The datasheet lists two, but my schematic symbol only has one on pin U3. (Perhaps the original creator of the symbol only entered the one that he needed. ) Does the SoloX have two ODTs? If not, then what is the recommended way to attach the ODT of the second rank?
3. I remember some of the processors were pin compatible. Is there a better pin compatible solution to the iMX6SoloX that would get better processing power and a better memory interface?