One demonstration circuit I've looked at shows the reset signal coming from the host microcontroller, which seems like a waste of an I/O pin.
Another appears to show an RC network, values unclear.
If I don't actually want the microcontroller to force reset the device then can I just tie reset high, is an RC delay enough, or would the device need a clean reset signal from a voltage monitor? With some other devices (Microchip I/O expanders) the reset appears optional and can be tied high.
I see that the reset pulse latches the state of the address pins. This would imply that reset timing is important.