Hiroyoshi Suzuki

Re: [Kinetis Microcontrollers] - Re: Glitch filter setting of the IRQ-pin of KEA

Discussion created by Hiroyoshi Suzuki on Feb 24, 2020
Latest reply on Mar 10, 2020 by Hiroyoshi Suzuki

Hi Jing-san


Thank you for a sample code of irq.c.zip. However, since some header files are missing, I couldn’t try this.

Instead, I created a test code by myself. Now, I’m a little confusing about the filter function.


According to my test result, I couldn’t filter out a glitch signal by FLTRST-bits. The followings are settings and instructions

Please let me know if I have some mistake or misunderstandings.


Settings : Please refer to the attached code

-            set FLTRST=0b11 and FLTDIV3=0b000. So, the filter frequency at PTA5/RESET/IRQ-pin is LPOCLK(1kHz). That is, less than 1ms pulse can be filtered out, correct?

-            Then disabled the RESET-pin and enabled the IRQ-pin as falling edge detection.

-            After that, input a 11us low-pulse to the PTA5/RESET/IRQ-pin (pulse.png). And then confirmed IRQ_SC[IRQF] could be set by the low pulse which is less than 1ms.


When I set both FLTRST = FLTA = FLTDIV3(1kHz) ,the result was the same.

If you can share your whole project file, please send it to me. I’d like to try your code in my environment.




Hiroyoshi Suzuki