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LPC3141, CS High to OE High Timing Question

Question asked by StanleyH Employee on Nov 25, 2019
Latest reply on Nov 30, 2019 by StanleyH

Hi Support team,

 

  We have a question about the timing specification in the LPC3141 datasheet. Need some explanation.

Please refer the tCSHOEH specification in the SRAM controller module as below. The minimum requirement is 3ns. However our typical is 0ns. Seems strange. Is the data correct? If yes, can you please give some explanation. Thanks.

 

 

 

-Customer, Delta IABU.

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