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Timing of DMA descriptor reload on LPC 54102.

Question asked by Chris ONeill on Sep 30, 2019
Latest reply on Oct 10, 2019 by Alexis Andalon

I have a sequence of DMA descriptors for a SPI slave for a single SPI operation.  The incoming command can be either a read or write, so based in the command the 'later' data descriptors are configured as to data source (read), data destination (write), and count.

 

What is the timing of the reload of transmit descriptors?  If I have an intermediate 'turn-around' descriptor to allow for configuration of the read or write descriptors, what is the time limit?  For transmit, at what point during the execution of the 'turn-around' descriptor is the next (data transmit) descriptor loaded?  Is there buffering in the transmitter?  For a 2-byte turn-around, how much time do I have to configure the data transmit descriptor before it gets loaded?  The full 2-byte transmit time, or less?

 

A timing diagram for SPI slave DMA descriptor loading would be a big help. 

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