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Memory caching in i.MX8

Question asked by Long Pham Employee on Jul 22, 2019
Latest reply on Jul 25, 2019 by Yuri Muhin

I have some questions relate to memory caching in i.MX8 system. I'm working in M4 side

 

I understand there are two instances/modules for caching

   + MPU in M4 core

   + LMEM in M4 subsystem

 

Is there any relation between MPU and LMEM. Do they depend on each other?

 

Is it possible if i enable both MPU and LMEM?

If i configure a DDR region is non-cacheable by MPU and enable LMEM, when i access the memory in non-cacheable region, is the data in the region cached?

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