SDRAM and Flash interface in LPC546xx microcontroller

[prasannanaik]

Hi,

   I have following queries regarding the external memory interface with LPC546xx:

1) Type of flash supported (parallel,serial, NOR,NAND,etc)

2) Can a SDRAM and a parallel NOR flash be connected together?

3) Refreshing of SDRAM: Does EMC takes care of this or software intervention is required to refresh SDRAM after regular intervals?

4) Clock speed supported for SDRAM

5) Interlocking between SDRAM and parallel flash (Bank switching)

6) I have never interfaced SDRAM or parallel flash with a microcontroller. Any supporting documents to understand the process, implementation,interfacing scheme and explaination would be helpful.

Thanks and best regards,

Prasanna

[frank_m]

The OM13098 a.k.a. LPC54628 Xpresso board has both SDRAM and external Flash onboard : https://www.nxp.com/part/OM13098#/
For the external Flash, the SPIFI interface is used.

You can get a SDK with working examples for both SDRAM and SPIFI for the MCUXpresso toolchain.

[jeremyzhou]

Hi Prasanna Naik,

Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.
1) Type of flash supported (parallel,serial, NOR,NAND,etc)
-- LPC546xx support all types of flash except for the NAND flash
2) Can an SDRAM and a parallel NOR flash be connected together?
-- I'm afraid not.
3) Refreshing of SDRAM: Does EMC takes care of this or software intervention is required to refresh SDRAM after regular intervals?
-- EMC will handle this.
4) Clock speed supported for SDRAM
-- Max ECM clock = 100 MHz

6) I have never interfaced SDRAM or parallel flash with a microcontroller. Any supporting documents to understand the process, implementation,interfacing scheme and explaination would be helpful.
-- Please refer to AN12026.

Have a great day,
TIC

-------------------------------------------------------------------------------
Note:
- If this post answers your question, please click the "Mark Correct" button. Thank you!

- We are following threads for 7 weeks after the last post, later replies are ignored
Please open a new thread and refer to the closed one, if you have a related question at a later point in time.
-------------------------------------------------------------------------------

[JoelD]

Hi JeremyZhou,

You answered the following ->

--------------------------------------------------------

2) Can an SDRAM and a parallel NOR flash be connected together?
-- I'm afraid not.

--------------------------------------------------------

But if we look at the LPC546 AN for SDRAM i/f (Pag 18) -> https://www.nxp.com/docs/en/nxp/application-notes/AN12026.pdf

It says: "The EMC bus can be shared by multiple devices, such as SDRAM, NOR flash, SRAM or
devices with an SRAM-type interface. "

Also in same application there are examples of daisy chained parallel i/f SDRAM and flash banks.

Please can you advise who is correct?

[prasannanaik]

Hi Jeremy,

   Thanks for your support. In point number 2, we have select lines EMC_CS3 to EMC_CS0 and EMC_DYCS3 to EMC_DYCS0 can be used to interface multiple memories together right? Then i should be able to interface SDRAM as well as NOR flash together. My application needs interfacing of both SDRAM and NOR flash. Please suggest the interfacing scheme.

Thanks and best regards,

Prasanna

[jeremyzhou]

Hi Prasanna Naik,

Thanks for your reply.
Q1) We have select lines EMC_CS3 to EMC_CS0 and EMC_DYCS3 to EMC_DYCS0 can be used to interface multiple memories together right?
-- Yes, it's available, however, it needs you to coordinate data and code in these two memories carefully during application runs, otherwise, it will cause unpredict error. In other word, it will make the application developing to become a bit complicated.
Please refer to attachment about both interfacing the SDRAM and parallel flash.

Have a great day,
TIC

-------------------------------------------------------------------------------
Note:
- If this post answers your question, please click the "Mark Correct" button. Thank you!

- We are following threads for 7 weeks after the last post, later replies are ignored
Please open a new thread and refer to the closed one, if you have a related question at a later point in time.
-------------------------------------------------------------------------------