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Bootclock initialization on a mk20dx

Question asked by Jacob Andersen on Dec 10, 2018
Latest reply on Dec 13, 2018 by Jacob Andersen

Hello

I'm using a MK20DX256 in a project. Normally i have used the generated BOARD_InitBootClocks()  to initialize the clock without problems but now i want to do it early in  SystemInit() because of a library that depends on it. 

 

I have tried to pasted the following code to the original SystemInit() after the watchdog initialization and for some reason the CPU dies. Is there a conflict with the mcuXpresso sdk if i'm doing it that way. I cannot figure out what's going wrong.

 

/* SIM->CLKDIV1: OUTDIV1=0,OUTDIV2=0,OUTDIV4=1 Set Prescalers 72MHz cpu, 36MHz bus, 24MHz flash*/
SIM->CLKDIV1 = SIM_CLKDIV1_OUTDIV2(1) | SIM_CLKDIV1_OUTDIV4(2);
/* SIM->CLKDIV2: USBDIV=2,USBFRAC=1 Divide 72MHz system clock for USB 48MHz */
SIM->CLKDIV2 = SIM_CLKDIV2_USBDIV(2) | SIM_CLKDIV2_USBFRAC_MASK;
/* OSC0->CR: ERCLKEN=0,EREFSTEN=0,SC2P=1,SC4P=0,SC8P=1,SC16P=0 10pF loading capacitors for 16MHz system oscillator*/
OSC0->CR = OSC_CR_SC8P_MASK | OSC_CR_SC2P_MASK;
/* Switch to FBE Mode */
/* MCG->C7: OSCSEL=0 */
MCG->C7 = (uint8_t)0x00u;
/* MCG->C2: LOCKRE0=0,RANGE0=2,HGO=0,EREFS=1,LP=0,IRCS=0 */
MCG->C2 = MCG_C2_RANGE0(2) | MCG_C2_EREFS0_MASK;
//MCG->C2 = (uint8_t)0x24u;
/* MCG->C1: CLKS=2,FRDIV=3,IREFS=0,IRCLKEN=1,IREFSTEN=0 */
MCG->C1 = MCG_C1_CLKS(2) | MCG_C1_FRDIV(3) | MCG_C1_IRCLKEN_MASK;
/* MCG->C4: DMX32=0,DRST_DRS=0,FCTRIM=0,SCFTRIM=0 */
MCG->C4 &= (uint8_t)~(uint8_t)0xE0u;
/* MCG->C5: PLLCLKEN=0,PLLSTEN=0,PRDIV0=7 */
MCG->C5 = MCG_C5_PRDIV0(7);
/* MCG->C6: LOLIE=0,PLLS=0,CME=0,VDIV0=0 */
MCG->C6 = (uint8_t)0x00u;
while((MCG->S & MCG_S_OSCINIT0_MASK) == 0u) { } /* Check that the oscillator is running */
while((MCG->S & 0x0Cu) != 0x08u) { } /* Wait until external reference clock is selected as MCG output */
/* Switch to PBE Mode */
/* MCG_C5: PLLCLKEN=0,PLLSTEN=0,PRDIV0=5 */
MCG->C5 = MCG_C5_PRDIV0(5);
/* MCG->C6: LOLIE=0,PLLS=1,CME=0,VDIV0=3 */
MCG->C6 = MCG_C6_PLLS_MASK | MCG_C6_VDIV0(3);
while((MCG->S & MCG_S_PLLST_MASK) == 0u) { } /* Wait until the source of the PLLS clock has switched to the PLL */
while((MCG->S & MCG_S_LOCK0_MASK) == 0u) { } /* Wait until locked */
/* Switch to PEE Mode */
/* MCG->C1: CLKS=0,FRDIV=2,IREFS=0,IRCLKEN=1,IREFSTEN=0 */
MCG->C1 = MCG_C1_FRDIV(2) | MCG_C1_IRCLKEN_MASK;
while((MCG->S & 0x0Cu) != 0x0Cu) { } /* Wait until output of the PLL is selected */
while((MCG->S & MCG_S_LOCK0_MASK) == 0u) { } /* Wait until locked */

Regards,

Jacob

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