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Detecting Different Software Reset Events, Additional Bits Beyond SRS

Question asked by Keith Smith on Oct 24, 2018
Latest reply on Oct 24, 2018 by Mark Butcher

I understand the POR and SW bits of the RCM-SRS0 register.

 

I see the POR (and LVD) bits on a power on of my K22F eval board.

 

I see SW bit set when using a JTAG re(start). See https://community.nxp.com/message/1056898?q=Detecting%20Different 

 

I also see an SW bit set when calling the core_cm4.h function __NVIC_SystemReset()

 

What I would like to have is one or more additional bits to distinguish additional reasons for calling __NVIC_SystemReset().

 

What are recommended procedures to have data persist across a restart session?

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