Hello,
Thank you for your reply. This is my first time asking question in NXP Community. I chose the wrong options. It is not a i.MX Processors problem. It is about MC9S12XF512. I had seen the answers for "How to Calculate Cycle Counter Value/Mask ", but no one gave the answers. Someone even said " It's a freescale mystery...". I will be very grateful if you can help me.
Have a great day,
Lei
Hi Lei,
I added here the received example from the application engineer.
Example: The application wants to receive a frame in every 4th cycle, start in cycle 1.
CCFMSK = Perioda-1 = 4-1=3
CCFVAL = in which cycle to start = 1
Best regards,
Diana