According to the I.MX6S & i.MX6QP datasheets, the GPIO pins threshold levels are defined as:
|High-Level input voltage||VIH||—||0.7 × OVDD||OVDD||V|
|Low-Level input voltage||VIL||—||0||0.3 × OVDD||V|
Does this also apply to the levels of BOOT_MODE pins with OVDD beeing VDD_SNVS_IN?
If not - which thresholds have to be applied?