RT1050 FlexSPI

[christiangradl]

Hi,

i want to connect my RT1050 to a FPGA via FlexSPI, using Hyberbus.

The max. clock freq is limited to 166 MHz.

Please can you tell me if these calculation is correct:

spi clock freq. 166 MHz => 332 MByte/sec (8 Bit Hyperbus) => DDR mode

The command and address settings takes about 13 Cycles, but the i can read with 332 MByte/sec.

Is this correct?

Thanx

[Carlos_Musich]

Hi Christian,

2 points:

- Can you please clarify and provide more details on how are you doing this calculations?

- FPGA device should be accessed by AHB command. All AHB accesses to FPGA will be transparent to SW driver (no SW intervention).There may be some special requirements from FPGA device. You can find this information on chapter 30.8.6 Application on FPGA device in the IMXRT1050 Reference Manual

Regards,
Carlos
NXP Technical Support

[christiangradl]

Hi Carlos

There are 3 connection lines between i.mx and FPGA:

QSPI (332 MHz, Hyperbus)

1 SPI (30 MHz, LPSPI)

EMC 16 bit Databus (100 MHz, SEMC, Reference Manual 49.4.9)

What do you mean with “FPGA device should be accessed by AHB command”

As mentioned in the Reference Manual 49.4.9, I can configure the SEMC for external SRAM access.

I set all waitstates, etc, to 0, then I setup the CS to 0x90000000 and then I can read/write through SEMC.

Do you think that this will not work?

Christian

Von: Carlos_Musich

Gesendet: Dienstag, 15. Mai 2018 23:27

An: Christian Gradl <christian.gradl@sigmatek.at>

Betreff: Re: - Re: RT1050 FlexSPI

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Re: RT1050 FlexSPI

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