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S32K144 -Conflict in PORTA PIN5 CFG vs RESET signal

Question asked by Andrea Olivieri on Feb 16, 2018
Latest reply on Feb 16, 2018 by Daniel Martynek

Hi there.

I'm working with the evaluation board  "S32K144 _EVB - Q100".

I'm performing an integration of the SDK drivers examples within a project (drivers are provided  in the S32DS installation folder, I did some modifications but mainly they are the same).

The tool chain used is:

  • Compiler +  Linker IAR for ARM for the executable building.
  • IAR EWB configured with a SEJJER J-Link interface (ultra+).
  • SEGGER JLINK Flasher for download the executable without debugging.

After the latest change I did on the IO ports configuration something strange happen:

The microcontroller seems to be completely inaccessible from the DEBUG and the FLASHER.

However the SW inside the the microcontroller works.

After some investigation seems that the RESET port is just like inhibited.

If I generate a reset pulse on the uC pin the SW keep to work.

The change I did seems to be related somehow to the RESET pin configuration: see below...

PORTC PIN5 configuration

The configuration structure is re-adaptation (for my project) of the "pin_settings_config_t" that I found in an SDK example.

That configuration affects the PORTA PIN5 connected to the RESET of the EVB: see below...

PORT A PIN 05 location on the board.

I've got a couple of questions:

  1. Is this microcontroller provided with a feature which inhibit the reset function via SW configuration?
  2. If yes...How can I get back from this situation? Because the debugger is not even able to communicate with the micro.

Thanks in advance.