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TLB1 IPROT bit with a PCIe IO memory space?

Question asked by Seth Opgenorth on Feb 9, 2018
Latest reply on Feb 12, 2018 by Serguei Podiatchev

Does it make sense to use the invalidate protection (IPROT) bit for an entry that also has the cache-inhibited and guarded bits set?


It seems like there would be no need to have 'invalidate protection' enabled when cache-inhibited is also enabled since I would imagine there would be no entries for it in cache anyway. 




This is on a p1014 and p2010 CPU, trying to get the correct TLB entries for a PCIe IO memory space. With the IPROT bit disabled, the CPU crashes ~5% of the time on reboots (machine check exception, producing a BUS_RBERR or read data bus error). With the IPROT bit enabled the CPU no longer appears to crash.