I am using the LPC54608 evaluation board OM13092 and want to get Ethernet running using a system core clock of 180 MHz. The examples of the SDK2.2 use only 48 MHz system core clock.
In the MAC_MDIO_ADDR register I have to select a CSR clock range (Bits 11:8). According to the user manual Rev2.0, I can set CSR values for clock ranges up to 150 MHz. How can I set a clock range for 180 MHz?
(Source: NXP UM10912 User Manual Rev. 2.0, Table 800)
P.S. The OM13092 uses a LAN8720 phy, which allows for a maximum MDC clock period of 400ns -> 2.5 MHz. If I would use the register value 1, I would get a clock of 180MHz / 62 = 2.9 MHz. Therefore I need the possibility to get a lower MDIO clock.