We have a problem that CS is negated before DTACK signal is asserted.
We got the following answer before.
"CS assertion period is extended for DTACK wait period"
However, there is the case that CS is negated befor DTACK singal is asserted.
(at both a Read access and a Write access)
And the communication with the external device becomes the error.
(An iMX6_WDT time out error occurs.)
About 10 systems of 200 systems have this problem.
We suspect that register setting may not be right.
We do not understand the cause of this problem.
A register dump is the following.
<Address> <Register name> <Setting value>
0x20E01E0 IOMUXC_SW_MUX_CTL_PAD_EIM_WAIT_B 0x00000001
0x21B8000 EIM_CS0GCR1 0x00020001
0x21B8004 EIM_CS0GCR2 0x00000100
0x21B8008 EIM_CS0RCR1 0x06000302
0x21B800C EIM_CS0RCR2 0x00000002
0x21B8010 EIM_CS0WCR1 0x09003003
0x21B8014 EIM_CS0WCR2 0x00000000
RFL=0 / WFL=0 / MUM=0 / SRD=0 / SWR=0
DAP=0 / DAE=1 / DAPS=0000
May I have any advice?
It is a product under production, and it is necessary to correct it immediately.
Your kind helps would be greatly appreciated.