Robert Alkire

UART Status Register Bits for LPC54102

Discussion created by Robert Alkire on Jun 15, 2017
Latest reply on Jun 21, 2017 by Robert Alkire

I am currently working on UART0 receive via interrupt with FreeRTOS. It was detecting error bits when it should not have.  I am using LPCopen 3.03 with GCC 4.9.3 on a LPC54102 (custom board) M4F only.

The problem was traced to a discrepancy between the data sheet and the include file uart_5410x.h with the UART Status Register Bits. It defines UART_RXDERR as 0xF100. These bits map to (8) OVERRUNINT, (12) START, (13) FRAMERRINT, (14) PARITYERRINT, and (15) RXNOISEINT. 

START is not an error, it is status of when a start bit is seen on the receiver input. The use of the start status would not be handled by an error routine. Also there is a define for UART_START.

It would also be more useful to have individual defines for each of the status as was done in the interrupt register bits and on other processors.  

Another  error  exists in the same UART Status Register bits, UART_TXDERR maps to bit 9 (0x200). Bit 9 is shown as reserved in the data sheet although the comment shows TX underrun. The data sheet mentions underrun in the feature list for the UART but there aren't any bits in the interrupt register, status register for underrun.