This topic seems not to be discussed anywhere in the forum so I have added it so that the potential is not overlooked.
There are various requirements to have an ADC sampling continuously and saving the values via DMA. On processors with only one ADC the question arises as to how the same ADC can be used to sample other channels without disturbing this (often high speed) sample stream?
Typically it is common to find the ADC's HW sampling being performed by a PIT (especially in devices that don't have a PDB - eg. KL parts) but one needs to be aware that the PIT, and most other sources, are limited to triggering the sample of only one of the ADC's inputs (note that the ADC usually has two inputs called A and B). Only the TPM (Timer/PWM Module) in the KL parts has the capability to allows using both A and B inputs, allowing either two (high speed) streams from two different inputs to be achieved or else the same ADC to be used for general purpose multiplexing of further samples in parallel.
A discussion of this configuration and operation has been added to Appendix A of
for reference when such capabilities are required, including code showing how a sequence of multiplexed inputs can be sequentially scanned without influencing the main high speed stream.