AnsweredAssumed Answered

i.MX6UL VSNVS Issue: Voltagelevel of VDD_SNVS_CAP @ Pin N12?

Question asked by Walter Wolfgang on Jan 23, 2017
Latest reply on Jan 25, 2017 by Jose Alberto Reyes Morales

Dear Community,

 

i have an issue regarding the VDD_VSNVS_IN. I am using the PMIC "MC34PF3000A7EP" and supply the VDD_VSNVS_IN with it. Normally the applied LDO in the PMIC generates 3V. But i measure at the output only 1,7V. If i disconnect the PMIC to the CPU at VDD_VSNVS_IN the 3V is back. So i think something is internally wrong  at the i.MX6UL. I noticed also that the LDO has only 1mA maximum.

 

If i measure VDD_SNVS_CAP at the external capacity i can only measure 1,1V. That should be 2,5V right ?

 

So can anyone give me the correct output voltage level for VDD_SNVS_CAP at Pin N12 ? Especially voltage level inclusive tolerances.

 

Thanks beforehand

 

Best Regards

Wolfgang Walter

Outcomes