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ls1012a GPIOs control by U-boot

Question asked by Nattapong Sungcharoen on Dec 1, 2016
Latest reply on Jan 10, 2018 by Justin Jonas

Hi , 

 

I'm try to control GPIOs from U-boot. 

I found gpio control code from ../ls1012afrdm/eth.c  function name reset_phy() that used for reset PHY.

Then , I try to add more MASK bit to control GPIO1[16 :19] and enable GPIO1 on RCW.

 

Changing 

#define MASK_ETH_PHY_RST 0x00000100   -->  0x000F0100         

 

 

 

And I added debug print to read value that was set at DATA register looking it's doesn't change.

 

Clock Configuration:
CPU0(A53):800 MHz
Bus: 250 MHz DDR: 1000 MT/s
Reset Configuration Word (RCW):
00000000: 08000008 00000000 00000000 00000000
00000010: 35080000 c000000c 40000000 00001800
00000020: 00000000 00000000 00000000 00014171
00000030: 00000000 18c28120 00000096 00000000
I2C: ready
DRAM: 1022 MiB
SEC: RNG instantiated
Using SERDES1 Protocol: 13576 (0x3508)
MMC: FSL_SDHC: 0, FSL_SDHC: 1
SF: Detected S25FS512S_256K with page size 512 Bytes, erase size 128 KiB, total 64 MiB
PCIe1: Root Complex no link, regs @ 0x3400000
In: serial
Out: serial
Err: serial
Model: LS1012A RDB Board
Board: LS1012ARDB Version: RevB, boot from QSPI: bank1
SATA link 0 timeout.
AHCI 0001.0301 32 slots 1 ports 6 Gbps 0x1 impl SATA mode
flags: 64bit ncq pm clo only pmp fbss pio slum part ccc apst
Found 0 device(s).
SCSI: Net:
############# RESET PHY ###########
gpdat = 0001f000

###################################

 

 

 

Thank you,

Nattapong

Original Attachment has been moved to: eth.c.zip

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