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How to set BOOT_CFG1 for Cypress NAND S34ML08G1

Question asked by Adam Garrison on Nov 23, 2016
Latest reply on Nov 23, 2016 by igorpadykov

I am a little confused on what the NAND_row_address_bytes[1:0] setting actually means.  We are working with a Cypress S34ML08G1 (full PN S34ML08G101BHI003).  Attached is the NAND boot cycles for the memory that suggests that there are 3 Row Addresses and 2 Column Addresses for 5 Memory Addresses total.

 

According to the wording of the i.MX6 TRM and the table that is attached, the setting of BOOT_CFG1[1:0] should be 0b00 which corresponds to 3 row addresses.  

 

I am confused by two other pieces of data.

  1. The SOM that we are using for development has the setting set to 0b11 which corresponds to 5 data addresses.  The memory part is the same.  This data suggests that the setting is 0b11.
  2. This community post which suggests that the BOOT_CFG1[1:0] corresponds to all address cycles, but does not go into detail as to why it references Row Addresses in the table.  This data suggests the setting is 0b00.

Which value should I set BOOT_CFG1[1:0] to with a Spansion memory with 3 row addresses, but 5 total memory addresses?

Thank you,

Adam

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