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LS1021A 1588 hardware clarification

Question asked by Todd Blackmon on Oct 18, 2016
Latest reply on Oct 25, 2016 by alexander.yakovlev

I have a couple of hardware questions about the LS1021A IEEE 1588 hardware as well as the TWR-LS1021A.  It's not quite clear because the shared registers are in the eTSEC1 space while the pins available are shared with eTSEC3 pins.

 

1. Is there only a single shared 1588 timer which is used by all eTSEC modules for timestamping (as well as the 2 TRIG_IN timestamp registers)?

2. Regarding the TWR board, is the eTSEC3 controller usable when the 1588 header pins are used for 1588 functionality?

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