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iMX6, display problem with mipi adv7282-m device source

Question asked by Gabriel GRANGE on Sep 15, 2016
Latest reply on Sep 20, 2017 by Qiang Li - Mpu Se

We success in display first acquisition from adv7282-m device after a problematic start (see https://community.nxp.com/message/830163 message)

 

We use PAL video signal and we test without adv7282 progressive format, and with progressive format (mipi clock is double). In these two adv7282 configuration case, we don't reach to synchronize output display image acquisition.

The ADV7282-M output data is 8-bit YCrCb 4:2:2 format and it uses one lane.

Routing MIPI stream into CSI2 is Ok.

 

But gstreamer command :

gst-launch-1.0 --gst-debug=*:1 -v imxv4l2src device=/dev/video0 ! imxv4l2sink

displays:

 Colors are wrong and there is also a vertical scrolling (see mp4 file). 

 

 

If we try to read some VDOA registers (example VDOA_VDOAC(@21E4000), there is a CPU freeze and watch-dog generates reset.

So we try to have more information in IPU configuration, so we add theses two lines un ipu_capture.c :

#undef dev_dbg

#define dev_dbg(dev, format, arg...) {dev_printk(KERN_ERR, dev, format, ##arg);}

We also set to 1 the DEBUG constant in mxc_v4l2_capture.c file

 


 

We try to compare two hardware management:

 

 

BASE1 OK

BASE2  HS

Hardware

Toradex Ixora

Toradex Apalis module : iMX6 quad

Toradex Analogue Camera Adapter

Custom board

iMX6 quad plus

Video decoder

adv7280

adv7282-m

Routing

Channel0 CSI0 / IPU0 parallel

Channel1 CSI1 / IPU0 mipi

Linux version

3.14.52 + adv7180.c patch

3.14.52 + adv7282.c driver

LOG file

LOG2_adv7180.txt

LOG2 adv7282-m.txt

Remarks:

Used Linux kernel and root filesystem are the same (only devicetree is different). Some debug traces has been added for adv drivers.

In case of adv7282-m, there is a start the encoder job from drivers/media/platform/mxc/capture/mxc_v4l2_capture.c file.

With adv7280 we don’t know how iMX6 transforms 720x575 acquisitions to 1024x768 output display. There is no trace in LOG2_adv7280.txt file

 

Our current questions are:

 

  •       Is combinaison one lane, mipi IPU0/CSI1 has been use with iMX6 quad plus design?

  

  •       Why with adv7282-m management, we find ‘In MVC:mxc_streamon’ trace with PFS=0x4 (instead of 0x7 as it appears in LOG2_adv7280.txt file, 0x4 is NA depending on Freescale documentation) ?
  •       What are parameters to manage IPU format from MIPI flow?

Original Attachment has been moved to: LOG2_adv7280.txt.zip

Original Attachment has been moved to: LOG2-adv7282-m.txt.zip

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