How much is thickness of MCIMX6DL-SDP pcb?

[shingoishida]

I found two different thickness values in i.MX6_SABRE_SDP_DESIGNFILES (REV C5).

#1: Board Thickness(mils):  41.740000

Refer to line20, SABRESDP_DESIGNFILES\Layout\GERBER Files\IPCD356.txt

#2: .062" THICK +/-10%

Refer to area D3, SABRESDP_DESIGNFILES\Layout\LAY-27392_C.brd

Which information is right? Thank you.

Best Regards,

Ishida

[robin_ptl]

Hi,

I had exactly the same query as Ishida, before stumbling across this thread.  However, it would appear that the impedance calculations shown in the excel spreadsheet attached in this thread gives different track/gap widths to that which are actually used in the layout.

For example, L1 USB traces are shown to be 5.3/9/5.3mils in the spreadsheet, but on the actual layout they're 5.3/3.7/5.3mils?

The same applies to the DDR3 routing, where 3.7/9/3.7mils is suggested in the spreadsheet for 100R diff traces on L1, but the actual layout uses 3.7/5.3/3.7mils.

Any reason for this?  I'm guessing it will certainly make a difference to controlled impedances!

Regards,

Robin

[hung_nguyen]

When the spreadsheet calls out 5.3/9/5.3mils, the middle number is trace center-to-center distance.  I'm not sure if you measured within the layout, or the layout called out specifically 3.7 as the middle number.  But 3.7mils is trace edge-to-edge distance.

Given equal trace widths, to calculate trace edge-to-edge distance, simply subtract trace width from center-to-center distance.

   9mils - 5.3.mils = 3.7mils

[Dilo]

I think you are wrong, because we can see the pictures of Si9000, S = 9mil, S means the edge to edge

[robin_ptl]

Thanks Hung, that makes a lot of sense now!  Perhaps this should have been better annotated in the documentation.

[shingoishida]

Thank you for your help.

[art · Accepted solution]

The second case is correct. Please find attached the actual i.MX6 SABRE SD board stackup file.

Have a great day,
Artur

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