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LPC1857: Is it possible to configure AHB bus masters priorities ?

Question asked by Samy Fantar on Jun 20, 2016
Latest reply on Jul 28, 2016 by Hui_Ma



In the context of a project for Viveris Technologies, I'm developping an application for a LPC1857 microcontroller that intends to display a user interface on a 800*480 LCD TFT screen.


I'm facing serious problem with framebuffer and screen synchronization. The UI displayed is shaking horizontally while the application continuously runs.


Framebuffer is located on an external 8Mo SDRAM (other datas accessed by the application are located on this external SDRAM). However, if I halt the CPU in debug session, or if the application is doing nothing (empty while loop) after filling the framebuffer, the screen stabilizes itself.


The LCD controller configuration and LCD timings parameters are fine.

My suspicion is about an AHB arbitration concurrency between the CPU (application accessing datas in SDRAM) and the LCD controller (LCD DMA FIFOs trying to get pixel datas in the framebuffer).


In the LPC18xx User Manual Rev 2.8 (p.29), it appears that " When two or more bus masters try to access the same slave, a round robin arbitration scheme is used; each master takes turns accessing the slave in circular order ". However, I can see on p.504 that EMC (the slave connected to SDRAM) has his own priority connection as follows :

1. LCD controller

2. M3 S-bus

3. M3 I/D-bus

4. Other bus masters


But that's not enough apparently. Moreover, I don't find something about changing AHB bus master priorities (CPU and LCD controller) in the User Manual.


My question is how can I increase the priority of the LCD controller over the CPU or what could be the other source of this horizontal unsynchronization ?


Thank you very much for your replies.


All the best,