lpcware

Missing Match Command when Capture occurs at the same time

Discussion created by lpcware Employee on Jun 15, 2016
Content originally posted in LPCWare by tglawrence_va on Tue Sep 23 06:03:53 MST 2014
On the 2468 chip found this behavior exists on at least timer0, timer1, and timer2.

Capture0 is set up to occur on a positive to negative, and a negative to positive transition, and to cause an interrupt.  For the sake of simplicity will assume the signal is a square way with a transition occurring every 10000 counts.  On a positive side of the square wave match0 will be used and on the negative match1 will be used.

Pseudo code listed below for the interrupt

Timer 0 Interrupt

Match0 true

{ if (T0EMR_bit.EM0) //If On
  { T0MR0 = T0TC + 5000; //Turn off in 5000 counts 
    T0EMR_bit.EMC0 = 1; // Clear Match0
    T0MCR_bit.MR0I = 0; // Do not cause interrupt (Also tested with Interrupt)
  }
  Clear Match0 Interrupt bit.
}

Match1 true

{ if (T0EMR_bit.EM1) //If On
  { T0MR1 = T0TC + 5000; //Turn off in 5000 counts 
    T0EMR_bit.EMC1 = 1; // Clear Match1
    T0MCR_bit.MR1I = 0; // Do not cause interrupt (Also tested with Interrupt)
  }
  Clear Match1 Interrupt bit.
}

Capture 0 True
{ if (pos) // Set if on positive side of the square wave
  { T0MR0 = T0CR0 + Delay; // Delay is the power control of the system
    T0EMR_bit.EMC0 = 2; // Turn On in Delay number of counts
    T0EMC_bit.MR0I = 1; // Cause an interrupt
  }
  else
  { T0MR1 = T0CR0 + Delay; // Delay is the power control of the system
    T0EMR_bit.EMC1 = 2; // Turn On in Delay number of counts
    T0EMC_bit.MR1I = 1; // Cause an interrupt
  }
  Clear Capture 0 Interrupt
}
End Timer 0 Interrupt

Everything seems to work find with the code until the Delay number becomes 5000. At that point in time see the following happen. (Note there are some variations to the input signal so it might vary by a few counts.)

Match0 turns on correctly, than when the expected turn off of Match 0 occurs the same time as the capture event Match 0 turn off appears to be ignored.

This was verified by looking at a scope signal for the interrupt signal as well as the outputs for Match 0 and Match 1.  When the timing is perfect when the end of Match 0 and the interrupt signal appears like they should occur at the same time, Match 0 does not clear.  This does not happen all the time, but only when the timing is perfect.

Note there is no interrupt on the turn off of the Matches.  When the interrupt of turn off of the matches was allowed the turn off interrupt was not called during the missing turn off.

Question is what occurs when you have multiple timer Matches, Capture at the same time.  Would it be possible for a Match to be missed?

I can work around this issue, but wish to get to the bottom of a possible cause of a Match not being accepted.

Note: At no time is the timer stopped!

Thanks for any help

Tim

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