Using SPIFI as SSP

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Using SPIFI as SSP

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by mmardinian on Tue May 05 03:23:46 MST 2015
Hello,

I'm currently considering using the LPC1857 for my new product.
Unfortunately I need 3 separates SPI interfaces.
Is there a way to configure the SPIFI in order that it behaves as a SSP peripheral?

Thank you in advance for your advice.

Michaël
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by mysepp on Tue Dec 22 09:23:00 MST 2015
Can you give a bit more details? What was the problem? How have you solved it?
You are now able to read/erase/write to EEPROM?
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by mplu on Tue Dec 22 05:32:32 MST 2015
Done !

I managed to use an SPI EEPROM using the SPIFI bus.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by mplu on Wed Nov 25 02:01:27 MST 2015
I've got a similar configuration, where I want to use a SPI device on the SPIFI bus. The only question is : is it possible or not ?
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by dmitryf on Thu Jun 18 18:00:13 MST 2015
Hi,

You can use USART in synchronous mode.for this.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by MikeSimmonds on Thu Jun 18 09:50:00 MST 2015
ISTR that there are posts here concerning the EMC peripheral on the (some?) 1800's where double reads are generated which cannot be disabled. (Or some such.) This could be an issue with, say, a memory mapped FPGA.

Cheers, Mike.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by starblue on Thu Jun 18 05:47:01 MST 2015

Quote: mmardinian
But, the LPC4357 is way to big (and expensive) for my needs


It is available in the same packages, and you can ignore the extra stuff you don't need (e.g. the Cortex-M0). Without the Cortex-M0 it uses the same amount of power if you use the same clock frequency (it can go a bit faster if you want).

So I don't see how it can be too big.

It is a bit more expensive, but not that much. According to Octopart the difference is roughly 1$ around about 8$ when buying 1000.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by mmardinian on Wed Jun 17 14:11:31 MST 2015
Actually yes, I do need 3 simultaneous SPI interfaces.
2 in Slave mode and an other one in Master mode.

We currently use the 1778 for our current products, but we wish to take a step up (clock speed and usb speed).
The 1857 is perfect unless this SPI limitation. But since it has a SPIFI beside the 2 SPI, I thought that someone has already used the SPIFI as a regular SPI port.

Thanks anyway.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by MikeSimmonds on Wed Jun 17 10:36:01 MST 2015
Do you need all three interfaces simultaneously?

You could take over the CS lines by code and add a new CS line for the third device.

On the 1778 (I do not know the 1800's specifically) the hardware SPI is flawed when
interfacing with e.g. EEPROMS because it always toggle CS for each operation
and when, programming an EEPOM, the CS line needs to be active for the entire setup phase.

Cheers, Mike.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by mmardinian on Wed Jun 17 02:11:40 MST 2015
Thank you for your answer (and sorry for my late response).
But, the LPC4357 is way to big (and expensive) for my needs.

Is there any way to program the SPIFI registers in order that it behave like a regular SSP?
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by starblue on Tue May 05 05:11:53 MST 2015
You could take a look at LPC4357. It has an additional SPI unit, or alternatively you could use SGPIO. Otherwise it should be upwards compatible with the LPC1857.
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