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Dear engineer, I have a question about simulation of signal integrity of DDR3L.Enclosure is the result of my simulation(R-C parallel termin--ation is done), including the  signal wave  on driver(CPU side) and receiver(DDR3L side).It bothers me tha

Question asked by longqi luo on Jun 15, 2016
Latest reply on Aug 16, 2016 by Adrian Stoica

simulation of signal integrity of DDR3L

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