AnsweredAssumed Answered

i.MX6 SNVS_LPCR register and power down

Question asked by torus1000 on Apr 18, 2016
Latest reply on Apr 26, 2016 by gusarambula

Hi

 

I just confirm power down of i.MX6.

 

I assume system power will be off if TOP bit in SNVS_LPCR set. (default=1)

 

(Q) Is it OK to leave all regulators in the PMIC on when I issue shutdown command?

 

I found following description in the old patch* which refer to TOP and DP_EN bit.

On sabresd board, PMIC_ON_REQ control pmic power on/off, we can set TOP and DP_EN of SNVS_LPCR to implement power off by software. On this way,SNVS RTC alarm can work after power off.

 

*patch:

Q&A: How is mx6 PMIC_ON_REQ under SW control?

https://community.freescale.com/docs/DOC-97660

https://community.freescale.com/servlet/JiveServlet/download/97660-1-266974/1256-ENGR00178629-i.MX6-sabresd-support-software-power-of.patch.txt.zip

I couldn't understand the relationship between TOP=DP_EN=1 and following descriptions in the manual.

・TOP

 Turn off System Power

 Asserting this bit causes a signal to be sent to the Power Management  IC to turn off the system power.

 This bit will clear once power is off. This bit is only valid when the Dumb PMIC is enabled.

      0 Leave system power on.

      1 Turn off system power.

・DP_EN

 Dumb PMIC Enabled

 When set, software can control the system power. When cleared, the system requires a Smart PMIC to

 automatically turn power off.

      0 Smart PMIC enabled.

      1 Dumb PMIC enabled.

(Q) What is the difference between TOP=1 and 0?

(Q)  What is the difference between DO_EN=1 and 0?

(Q) why set both TOP and DP_EN when powered off by software?

 

Can anybody help me?

Thanks.

Outcomes