From HDG, "Table 2-7. Oscillator and clock recommendations" wrote;
2. External kilohertz source
"The RTC_XTALI signal should not be driven if the VDD_SNVS_CAP supply is off"
Could you explain the purpose of this restriction?
My customer is thinking to use VDD_SNVS_IN from PF0100, dropping to 1.0V to provide power with the external 32KHz clock circuit.
Since VDD_SNVS_CAP is generated from VDD_SNVS_IN with some delay, might there be a condition which applies the above restriction?