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About ASI master clock of MX6UL

Question asked by yuuki on Oct 29, 2015
Latest reply on Jun 29, 2017 by ken meng

Dear all,

 

I want to use SAI of i.MX6UL.

 

I refer to Chapter 43 of RM.
http://cache.freescale.com/files/32bit/doc/ref_manual/IMX6ULRM.pdf
- Chapter 43 Synchronous Audio Interface (SAI)

 

I have some questions.

 

<Q1>
I understand the Master Clock of SAI is generated by SAIx_CLK_ROOT.
Is SAIx_CLK_ROOT connected directly with Master Clock of SAIx?

 

<Q2>
In MCLK Select field of I2Sx_TCR2 register, audio Master Clock option can be chosen.
However, I cannot find the explanation about these options.

Would you tell me the point where this is explained?

 

<Q3>
In MCLK Select of the I2Sx_RCR2 register, would you tell me the concrete clock name of "00:Bus Clock selected"?

 

May I have advice?

 

Best Regards,
Yuuki

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