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Using ECC with DDR3 in u-boot on Vybrid?

Question asked by Sanchayan Maity on Mar 31, 2015
Latest reply on Apr 16, 2015 by jiri-b36968

Hello,

 

The Vybrid datasheet mentions ECC support with DDR3 in 8 bit mode. Currently trying to test this on Colibri Vybrid VF61 module with u-boot 2015.04-rc4.

 

The code snippet for enabling this ECC support is as below:

 

  /* Clear ECC errors in IN_STAT DDRMC_CR80 */

    writel(0x00000078, &ddrmr->cr[81]);

 

   /* Re-configure the DDR controller for an 8-bit port width; reduc = 1 */

    writel(0x0000010C, &ddrmr->cr[78]);

 

    /* Enable ECC - reporting and correcting on */

    writel(0x03000000, &ddrmr->cr[57]);

 

   /* Need to disable checking on partial writes */

    writel(0x01000000, &ddrmr->cr[58]);

 

    ddrmc_phy_init();

 

    writel(DDRMC_CR00_DRAM_CLASS_DDR3 | DDRMC_CR00_START, &ddrmr->cr[0]);

 

    while (!(readl(&ddrmr->cr[80]) && 0x100))

   udelay(10);

 

    for (ptr = PHYS_SDRAM; ptr < (PHYS_SDRAM + 134217728UL); ptr++) {

   *ptr = 0;

    }

 

   /* Allow the ECC codes for the entire user word to be corrupted */

    writel(0x00000000, &ddrmr->cr[58]);

 

    int_stat = readl(&ddrmr->cr[80]);

    printf("INT_STAT: %x\n", int_stat);

 

This is base on what I understand from the section 34.6.5 of the Vybrid TRM and the register descriptions of CR57, CR58 and CR78. Currently, with this change in place u-boot hangs. To be more exact, it hangs in the relocate_code function, defined in arch/arm/lib/relocate.S. This is confirmed by having a debug print function call,

 

ENTRY(relocate_code)

    ldr    r1, =__image_copy_start    /* r1 <- SRC &__image_copy_start */

    subs    r4, r0, r1                /* r4 <- relocation offset */

    beq    relocate_done        /* skip relocation */

    ldr    r2, =__image_copy_end    /* r2 <- SRC &__image_copy_end */

 

copy_loop:

    b print_debug

    ldmia    r1!, {r10-r11}        /* copy from source address [r1]    */

    stmia    r0!, {r10-r11}        /* copy to   target address [r0]    */

    b print_debug

    cmp    r1, r2            /* until source end address [r2]    */

    blo    copy_loop

 

u-boot hangs at the ldmia instruction, so just before the relocation operation it hangs at that instruction with only the first debug print getting printed on the console and no second debug print. If ECC is disabled, it boots up.

 

Has this been tested on Vybrid with uboot by anyone? Any pointers?

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