About ODT setting for DQS in i.MX6DQ.

[keitanagashima]

Dear All,

Hello.

Could you tell me the how to set the ODT value for DQS line of DDR3 in i.MX6DQ?

Which is right setting register for DQS "IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS*_P" or "MMDCx_MPODTCTRL"?

And, if one set the both registers, which is register value reflected?

Best Regards,

Keita

[art · Accepted solution]

The MMDCx_MPODTCTRL register does not configure the ODT resistor value for the DQSx signals, it only configures the ODT resistor values for the Data signals. The ODT resistor value for the DQSx signals is configured by the corresponding IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQSx_P register.

Have a great day,
Artur

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