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SPI CS active through a write and read cycle?

Question asked by Mark Nordstrand on Aug 7, 2014
Latest reply on Aug 11, 2014 by ZhangJennie

MK20DN512VLQ10 with CW 10.4. 


Connected to flash which needs CS asserted through the command, address (both writes), and the reading of the data.  I don't see a way to do this with SPIMaster_LDD short of taking over CS as a GPIO and controlling it directly.  Is this correct, or am I missing something?