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Problem halting iMX6 Chips (ARM Cortex-A9) at reset

Question asked by Nathan Palmer on Jul 30, 2014
Latest reply on Jul 31, 2014 by Yuri Muhin

Has anyone figured out how to halt the iMX6 (Cortex-A9) CPU just after or at reset?  My reset-init is taking too long to halt and I am ending up with a non-predictable system debug environment.  It loads the CPU boot ROM and is well into initializing my boot loader (U-Boot) before the halt takes affect.

 

In order to use OpenOCD I have to erase U-Boot from FLASH, and even then the ROM boot code is executed. 

 

I am hoping that some one here has a clue on making a more reliable iMX6 (actually an iMX6sl) debug environment.

 

Thanks!

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