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GPIO_16 configuration for IEEE-1588 operation when using Gigabit Ethernet PHY with RGMII interface

Question asked by Peter Lischer on Apr 15, 2014
Latest reply on Apr 6, 2017 by Yuri Muhin

According to the design checklist table 2-9 issue 2, the GPIO_16 ball must be either left unconnected or driven by the external clock source when using the IEEE-1588 operation. As far as I understand, the 50MHz Ethernet reference clock on ball GPIO_16 is only used for RMII interfaces and not for the RGMII. We are using the KSZ9031 gigabit Ethernet PHY which generates the 125MHz clock reference signal. The PHY is connected over the RMII interface to the i.MX 6. The 125MHz reference clock is feed into the i.MX 6 by using ball ENET_REF_CLK (V22).


Is it sill necessary to route the internal 50MHz reference clock trough the GPIO_16 ball when using the IEEE-1588 counter? Is it really needed to leave the GPIO_16 ball unconnected in this case even tough, the 125MHz reference clock is provided by another ball?


Thank you for clarification.