I last used Motorola/Freescale processors back in the 68000 days. Back in the day you used R/W (Read/Write) and DS (Data Strobe) signals to access the data bus.
I am now converting projects using that processor to a V4 MCF5441x. I noticed that there is a R/W signal for the FlexBus, but there doesn't seem to be a functional equivalent to the DS data strobe. Since I have existing IO boards that were using this signal, I suppose I will have to re-create it from the new signals.
But I was wondering if anyone knew the history of when Freescale made what looks like a philosophy change in bus access... is this following a new industry standard/specification or was it changed for some other reason? As I recall there was a big debate between the Motorola vs Intel bus timing... it looks like this is yet a third approach.