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Multiplexing JTAG and EZport Pins In CPLD

Question asked by Kevin Kirspel on Jul 10, 2013
Latest reply on Jul 11, 2013 by Kevin Kirspel

In my system I will have 2 processors.  An iMX6 host processor for the GUI and a Kinetis K10 for real-time processing.  The iMX6 will be able to program the K10 through the EZPORT interface.  I will also be using a Segger J-link with the K10.  On the K10, there are 3 JTAG pins that are multiplexed with EZPORT pins.  I was going to route these pins through a CPLD which would have logic to switch these signals between the iMX6 and the Segger J-Link.  By default the pins will be switched to the J-link.  If the iMX6 wants to program the K10, it will switch the pins using one of its DIO pins.  Does anyone see a problem with this?  I have attached a diagram to illustrate the idea.

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