Example PE Project for the TWR-K60F120M board

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Example PE Project for the TWR-K60F120M board

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ERussell
Contributor IV

Is there an example PE project for the TWR-K60F120M board? I'm having problems running my target board with this newer chip and wanted to see an example. Running my code results in a hard fault and doesn't get past the PE_low_level_init routine.

 

Thanks,

 

Elizabeth

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MarkP_
Contributor V

Hi,

looks similar problem which I have on K10.

https://community.freescale.com/message/110666#110666

Does your CPU has mask code 0N96B?

~Mark

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matthewbaker
Contributor II

Is this really the answer to the question??? I too am looking for a 'Hello World' LED Blink Processor Expert tutorial resource as a first timer for the TWR-K60F120M but so far the freescale provided examples that I have been able to find leave a lot to be desired.

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BlackNight
NXP Employee
NXP Employee

A tutorial with Processor Expert for blinking LED's (for KL25Z, but applies too for TWR-K60F120M):

Tutorial: Enlightning the Freedom KL25Z Board | MCU on Eclipse

Examples with PEx for TWR-K60F120M:

mcuoneclipse/Examples/TWR-K60F120M at master · GitHub

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Petr_H
NXP Employee
NXP Employee

Hi,

have you looked here:  Where can I find Processor Expert examples and tutorials in CodeWarrior?

Best regards

Petr Hradsky

Processor Expert Support Team

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BlackNight
NXP Employee
NXP Employee

Not exacly for K60F,

 

K60:

http://www.steinerberg.com/EmbeddedComponents/Examples/Example_TWR-MK60_FreeRTOS/home.htm

K70F:

http://www.steinerberg.com/EmbeddedComponents/Examples/Example_TWR-K70F120M/home.htm

 

Maybe that helps. Make sure you select the exact matching part in your project.

 

BK

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ERussell
Contributor IV

The problem seems to be in the clock settings. My target board works in the FEI mode but not in PEE mode. 

 

I created a bare board PE project and was able to run using the default clock settings - FEI mode. When I changed the settings to the PEE mode the program hangs up in the _init_hardware routine while checking that the oscillator is running. There is an 8 MHz crystal on the board which according to the RM should be sufficient (although it is the minimum frequency) for using the PLL. 

 

Any ideas?

 

Thanks,

 

Elizabeth

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ProcessorExpert
Senior Contributor III

Hi, 

If you set 8 Mhz as crystal value, it's not correct. The tower board contains 50MHz oscillator for the processor so it's necessary to set Clock settings / System oscillator 0 / Clock source to External reference clock and the following property "Clock frequency" to 50 MHz if you wan to use it.

As far as I know, the 8MHz crystal is just for the debugging intertace.

Please import and see the attached project where I tried using PEE and it seemed to go to main() correctly.

 

 

best regards
Petr Hradsky
Processor Expert Support and Servicepacks Team

 

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ERussell
Contributor IV

Thanks for your response. The 8MHz crystal  is on my target board - I do not have a tower board for the K60FN1M0VDM12 chip. I had been running fine in PEE mode with the K60N512 chip on my target board and had the processor replaced because I needed more memory. 

 

What I would like to see is an example of setting the mode to PEE for the K60FN1M0VDM12 using an 8 MHz crystal.

 

Thanks,

 

Elizabeth

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ProcessorExpert
Senior Contributor III

Unfortunatelly, I don't have any hardware with possibility of 8MHz crystal to test on, but please post a sample project or at least screenshots showing the settings values and we can try to look at it. It might also be a hardware issue.

 

best regards
Petr Hradsky
Processor Expert Support Team

 

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ERussell
Contributor IV

I have attached a minimal PE project that shows the settings for a target board using an 8MHz crystal in PEE mode. When I try to run, the program hangs up on the statement:

 

while ((MCG_S & MCG_S_OSCINITO_MASK == 0x00U) { /* Check that the oscillator is running */

}

 

in the file Cpu.c.

 

The program runs fine in FEI mode. The same board with the K60DN512 chip runs fine in PEE mode.

 

Thanks,

 

Elizabeth

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ProcessorExpert
Senior Contributor III

I have look to the project and from the first look it doesn't seem to be configred correctly for crystal and PLL:

 

- The external clock are not configured in the Clock settings (set Clock settings / System oscillator 0  to enabled, and ajdust clock frequency under it etc...)

 

- The Clock source settings / Clock source setting 0 / MCG settings / MCG mode is set to FEI and should be PEE if you need it. 

 

- Go to Clock configurations / Clock configuration 0 / System clock and adjust the values to allowed numbers (it worked for me e.g. 40,20,10,10)

 

The re-gerenate project and re-compile. 

 

best regards
Petr Hradsky
Processor Expert Support  Team

 

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ERussell
Contributor IV

Are you sure you were looking at the correct CPU component - there were two, the default that is set for FEI and the one I added that selects the PEE mode. I didn't send the project that I'm actually using and had created a new one and obviously didn't complete the setup - hence the selection of the external 50 MHz reference clock.

 

I have now selected the external crystal option and removed the default CPU component. I have run this on my target board and get the same result as I mentioned before. The program hangs up while checking that the oscillator is running.

 

Thanks,

 

Elizabeth

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MarkP_
Contributor V

Hi,

looks similar problem which I have on K10.

https://community.freescale.com/message/110666#110666

Does your CPU has mask code 0N96B?

~Mark

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ERussell
Contributor IV

Mark,

 

Yes that is the same mask as my CPU. I had looked at the errata and made the change to field HG0 but not to the Range field. Changing the Range from 2 to 1 does seem to have solved the problem! I don't know whether this is a reliable fix but hopefully this problem will be fixed in the next mask.

 

The issue then is how to keep PE from overriding the Range setting when the CPU component is generated. I don't see a setting for the Range field of MCG_C2 in the CPU component in PE.

 

Thank you so much for your response!

 

Elizabeth

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BlackNight
NXP Employee
NXP Employee

Hi Elizabeth,

now I was running myself into the same issue with the range field on my TWR-K60F120M as it has as well that mask set with that silicon issue. And I have not found a setting in Processor Expert which would affect the range field. But I have documented how to disable code generation so it does not revert my change:

http://mcuoneclipse.com/2013/10/27/usb-with-the-twr-k60f120m-and-twr-k70f120m/

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