PG1

MC9S08 Bizarre BDM/ATD/COP/STOP problem

Discussion created by PG1 on Mar 6, 2012
Latest reply on Mar 7, 2012 by PG1

I have the following code below.

 

It works fine when the BDM is not connected, or BDM is connected with COP DISABLED.

 

When the BDM is connected, and COP is ENABLED,  the debugger hangs on the while loop.

apparently because there is never any int from the ADC. Since the COP counter is set to zero and frozen in

STOP3 mode, there is no WDT occurring while the converter is busy.

 

The ADC is configured to use the clock generated within its own module.

 

1) Is this a limitation of the BDM

2) Why would the ADC stop working if the COP was enabled?

3) As an aside, The BDM has an option to keep all clocks running in stop mode by using BDM commands to write to

   BDM registers outside of the memory map. How do you do this in True Time SImulator/Real Time Debugger

 

.......

    gOnChipATDConversionComplete=FALSE;              //Arm Flag
    ADCSC1=ENABLE_ADC_INTS+INT_BG_AD_INPUT;          //do a converstion
                                                     //results will be in
                                                     //gATDResults, loaded
                                                     //by isr
   
               
    __RESET_WATCHDOG();
      
    while (gOnChipATDConversionComplete==FALSE)       
         {
         _Stop;                                      //sit here and wait, not using any extra power
         }
......

 

......

  ///////////////////////////////////////////////////////////////////////////////
 // Function: isrADC               
 
 // Passed Parameters:             
 //      none
 // Return Parameters:
 //      none
 // Description:
 //     Called when conversion complete. Allows complete processor shutdown during
 //     conversion because the hardware will wake up on this int, allows for reduced energy
 //     consumption and radiated e.
 // Test Status:
 //      Tested on BDM
 ///////////////////////////////////////////////////////////////////////////////
#pragma CODE_SEG NON_BANKED         //in case banked memory model is used, cpu does
                                    //does not support bank number on hw stack

  void interrupt 17 isrADC()
  {
    gOnChipATDConversionComplete=TRUE;
    gOnChipATDResults=ADCRH;              //ack the int by
    gOnChipATDResults*=256;               //reading registers
    gOnChipATDResults+=ADCRL;             //in a specific order while
                                          //while converting to
                                          //a 16bit uint
    return;
  }

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